Competition Session

Session 4D (Competition Session; Emerging Sensing Systems; Aug.20, 16:25, Xuedou Hall):

1.Shaohui Xu (School of Transportation, Southeast University), Menghang Liu, Chengzhi Ji, Hang Yu, Zhao Cang, Ziyuan Pu. A Unified Dual-Architecture Methodology for FPGA Acceleration of ML-KEM and ML-DSA

2.Lei Peng (Harbin Institute of Technology, Shenzhen), Yalin Wang, Yunbo Jia, Yuanhao Bai, Aijiao Cui, Yier Jin. SAPA: A Programmable Shared Polynomial Arithmetic Accelerator with Semantic Handoff Validation for Staged ML-KEM/ML-DSA Flows

3.Jingbo Zhang (Beijing University of Technology), Haoxiang Sun, Wenbo Wang, Wenbo Zhang. ContractHIL-HLS: Contract-Aligned Multi-Agent Workflow with Hardware-in-the-Loop Feedback for HLS Design

4.Li Chaozheng (college of Electronic Science and Technology, National University of Defense Technology), Deng Ding, Li Lu, Wang Wenhao, Sun Pengyue, Ou Gang. A One-Bitstream KV260 Accelerator for ML-KEM-512 and ML-DSA-44 with Split KEM Datapaths and Sign-Path Early Rejection

5.Wenkai Mo (College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics.), Jiacheng Zou, Yi Tang, Zixiang Hu, Qi Deng, Zhaodong Lyu, Yuhao Shu. An FPGA-Based ML-KEM/ML-DSA Accelerator with Shared Engines and Rejection-Aware Signing Scheduling